Mar 29, 2001 Located in Freiburg - a small city in southwestern Germany known more for its splendid medieval cathedral than a state-of-the-art IC fab - the Micronas site manufactures digital video and audio signal processors, customized embedded controllers, and interface components. While 70% of the fab's output is devoted to the manufacture of chips for use in consumer electronics and multimedia products, 30% is spent on the production of chips for the increasingly important field of automotive electronics. Late last year, the company acquired the image and video consumer electronics operations of Infineon, the huge chipmaker headquartered in Munich, Germany. The purchase is expected to expand Micronas's expertise in the audiovisual field.
The company's manufacturing techniques may not represent the cutting edge of semiconductor technology; it is not planning to shift to copper dual-damascene structures, 0.18-µm and smaller linewidths, and 300-mm wafers. But it doesn't need to. The company is the world's largest producer of MP3 products and operates one of the few IC fabs to produce the chips necessary to drive the WorldSpace satellites; both of these types of products can rely on aluminum interconnect technologies and conventional wafer sizes.
This report focuses on the construction of Micronas's new fab module at the company's Freiburg facility. The firm's concepts of erecting fully independent fab modules, organizing cleanroom space flexibly, and arranging process baays so that operators can perform multiple tasks in compact areas have enabled the fab to continue manufacturing through regular maintenance cycles, unscheduled tool downtime, and even an arduous redesign and construction project.
A Growing Fab in a Small German Hamlet
Micronas, founded in Switzerland in 1989, occupies several multistoried buildings in an industrial area on the outskirts of Freiburg. The oldest fab building was constructed in the 1980s, and the construction of two other facilities followed: module 1 was completed in 1998, while its adjacent neighbor, module 2, was begun in May 2000 and ready for equipment installation in October. When the new module is up and running, two fabs a 6- and an 8-in. will operate independently of each other. To complete the total redesign of the original fab building and the construction of module 1, including the purchase of new equipment, the shift from 5- to 6-in. wafer fabrication, and the introduction of 0.5-µm technologies, the company invested CHF 180 million (more than $100 million). The module 2 project, including the introduction of 8-in. production, cost an additional CHF 145 (more than $80 million).
Micronas shifted to 6-in. manufacturing in 1997-1999 and plans to open an 8-in. production line with a pilot volume of 70 wafer starts per day in October 2001, with the capacity to ramp up to 150 wafer starts per day without having to expand cleanroom floor space further.
The older fab areas have Class 100 cleanrooms, while module 2 contains a Class 1 cleanroom. With the completion of the new module, the company will have a total of 3900 m2 of cleanroom space. However, Nikolaus V. Kaeppeler, Micronas general manager and vp of front-end operations, cautions that it is not easy to quantify cleanroom floor space. Pointing to a floor plan of the facility, he says: "I can place tools here according to modern cleanroom concepts, but it is difficult to say that I have such and such more capacity, because that's an old concept.... It's correct to say that the 3900 m2 is a net amount of cleanroom floor space. When viewed as a ballroom area, the space would be less." Initially, 80% of module 2's cleanroom floor space will be in use, allowing the company plenty of room to respond to the demands of the market.
Module 1 was designed so that it can be extended in two directions. Now that the area has been extended with the construction of module 2, another 1600 m2 of cleanroom space can be added at any time without interrupting operations. Kaeppeler, a physicist by profession, remarks: "Our intention here was to have a concept of expanding in this direction [toward the outer corridor]. That's why the corridor is relatively wide, so that I can move the tools around. When the next module is completely finished, we will be able to change the size of these spaces. That will happen in the near term; we have already prepared for it. And in order to have more room, we will move the [cleanroom] wall into the center of the corridor."
Parallel to the module 2 construction project that will greatly increase Micronas's manufacturing capacity are efforts to implement the smaller linewidths demanded by new semiconductor technologies. While the company produces the layers for older, 1.0-µm device technologies in its mature lithography bay, the new fab module will be equiped to produce devices with linewidths in the 0.25-, 0.50-, and 0.80-µm ranges.
"Here [in the completed module 1] our concept is to link resist developers with the steppers establishing an interface between these processes," explains Kaeppeler. "That's important because significant factors influencing the distribution of critical dimensions are humidity, temperature - but most important in the half-micron and submicron ranges, the timing between laying down resist layers and lithography or between lithography and developing. That's why you can control these processes only when the tools are interfaced. A workflow arises in which the wafer is coated with a resist layer, is baked, then is sent to the stepper, and after a certain amount of time-tempered again, developed, and so on." The company uses various generations of FSI International's Polaris resist coating system and steppers from Canon.
Multitask Process Bays
The company's goal of ensuring that its 24-hour-a-day production cycle will not have a negative effect on productivity and quality has led it to implement certain procedures, according to Kaeppeler. For example, almost all of the fab's bays perform a mix of lithography and etch processes. That's not the case in every fab, he stresses. In other fabs, one bay might contain metallization tools and another oxidation or etching tools. "That's generally not how it works in our fab because we are continually growing and moving tools around the cleanroom." An advantage of Micronas's system is that when one bay or another must be shut down for preventive maintenance or configuration changes, the whole line does not come to a halt.
Running a fab with multitask process bays requires that the operators be capable of performing a variety of functions. Micronas has three personnel categories: process engineers, most of whom are physicists, specialists in other physical sciences, and to a much lesser degree chemical engineers; equipment and maintenance staff, which consists of engineers and technicians; and operators with a technical-trade background. Kaeppeler comments that the relative dearth of IC fabs in the Freiburg region has been a boon to the company's recruiting efforts. Aside from Philips Semiconductors SMST near Stuttgart (formerly an IBM fab), the only other nearby semiconductor facility is Microelectronic Marin in the vicinity of Neuch tel, Switzerland.
Although several Micronas technicians have not completed an apprenticeship program to qualify them as wafer manufacturing operators, they have worked at the company for so many years that they have acquired broad technical knowledge. Some operators, according to Kaeppeler, have even become engineers without having completed the requisite academic training. As time goes on, however, there is less and less distinction between maintenance personnel and operators. The fab's large capital investment requires that operators acquire sufficient know-how to carry out preventive maintenance and solve tool problems.
Operators' ability to acquire broad-based technical expertise is facilitated by the fact that the fab uses a standardized tool set. Stressing that the process bays with etchers from Lam Research contain "nothing exotic," Kaeppeler remarks that in the last few years the equipment world has become highly standardized. In the six or seven fabs he has visited in Asia, he has seen many of the same tools that populate his own cleanroom. "Perhaps 10, 15 years ago, everything looked different.... That's a good thing because, after all, the fabs are there to produce, not to perform engineering tasks. A great variety of machines makes it difficult for fab personnel to improve production processes, optimize tool use, and acquire technical know-how. When all is said and done, the point is to be productive, efficient, and fast not to conduct experiments."
Intensive Defect Reduction Program
To accomplish the tasks of achieving productivity, efficiency, and speed, Micronas has implemented an intensive defect reduction program over the last few years. "In one way or another, all of the company's personnel are involved in that effort. It is one of the most important areas of focus and a high priority." The company has a specific defect analysis team that conducts patterned-wafer inspections and metal-ionics investigations, while proposing new projects big and small. "The work of this team is measured against the goal of determining how steep the learning curve is. Is it 3%? Is it 6%? Our level tends to hover more around 6% than 3%. The defect group it has only a few members formulates new topics for investigation and introduces these topics in the form of new projects to all fab personnel, including those in process engineering, technology, equipment engineering, and production."
Using statistical methods, the defect analysis team performs continuous defect evaluations and frequency analyses to develop corrective measures, such as process improvements, equipment modifications, or wafer-handling changes. The company does not place particular value on having each production team individually measure how it has benefited from defect-learning strategies. "We think that's a waste of time," Kaeppeler says. "Everyone must know the defect reduction curve as measured against our goal of achieving rapid improvement."
Kaeppeler points out that semiconductor companies early on began to exchange defect reduction information, organizing workshops and establishing benchmarking activities. Like other firms, Micronas has sponsored workshops to discuss the best defect reduction practices and procedures and to determine underlying methodologies. "Everyone brings something to these efforts," Kaeppeler concludes. The discovery of new defect types, including previously unknown killer defects, requires an effective procedural structure and proper methods, and these methods are, for the most part, similar among successful IC manufacturers. "They are similar because of the exchange of information." That industrywide uniformity reflects the fact that defects themselves are similar from fab to fab. However, because each facility has its own concerns, one fab's defect strategies will differ somewhat from those of another. "In the end," Kaeppeler concludes, "the important thing is that yield learning proceed expeditiously.... When things don't proceed at the right speed, there is something wrong with the method."
Reclaiming Water and Chemicals
Micronas recirculates or reclaims as much of the water and chemicals it uses as possible. Used liquids in the form of wastewater, process water, or water from the air-conditioning systems are filtered in a variety of ways. Kaeppeler points out, "For one thing, that's nice for the coworkers, for our recuperation, but for another, there's a 'payback,' a once-a-year payback, because our wastewater bills are reduced. And we also have a positive image among city agencies." The current location of module 2 previously was the site of a biotope, an outdoor pond that served as a repository for fab water. But now water is filtered in a unit located elsewhere on the campus.
Used chemicals are treated in much the same way as used water. Whenever the company can reclaim the chemicals it consumes, it does so by either using them again or by making them available to third parties. For example, it delivers used sulfuric acid to other industries that can reuse it. The company notes that its reclaim and treatment efforts will be the subject of an environmental report to be published later this year.
Nearing the Leading Edge
A messy, dusty construction site could potentially spell disaster for semiconductor manufacturing processes that are acutely sensitive to particles and other contaminants. Nevertheless, the Micronas expansion has been carried out with little disturbance to ongoing production for several reasons. When the construction of module 2 began as an extension of the already existing fab building housing module 1, the original outer wall separating the two modules was kept in place. During the last construction phase of module 2, which included the construction of the new cleanroom, a plastic dust shield was hung between the two modules and the wall separating them was torn down. Subsequently, the plastic material was removed and the new Class 1 cleanroom was opened. Because module 1, the working cleanroom, has a positive air pressure of 10 Pa, contamination from the neighboring construction site was prevented from entering. Moreover, all cleanroom construction materials were prepared for use in containers supplied by facility building firms that ready, pack, and install cleanroom components under clean conditions.
In addition to its already-existing operations including a department for wafer deliveries, a facility for wafer backside cleaning, and an analytical laboratory with electron microscopes, absorption technology, and spectrometry instruments the company will start up chemical-mechanical polishing (CMP) operations in conjunction with 0.25-µm manufacturing. Because CMP generates high particle levels, that new department will be quartered in the old fab building to prevent cross-contamination. Material flow, however, will not suffer from this separation of functions, because the old building is connected to the other production areas via a bridge. Moreover, the CMP area will also be used for other "dirty" processes, such as wafer grinding.
The company does not intend to shift to 300-mm wafer processing in the foreseeable future. Kaeppeler notes that Micronas hopes to react quickly to the capacity and technology demands of the market and to its growing market niches by expanding modularly, which would not be possible if the company were to introduce an entirely new wafer technology. "If I shift to 300 mm, I have a large initial investment, obviously. That doesn't correspond to our scheme. For me, 300 mm would mean some kind of a greenfield operation, which would demand a totally different concept. We are in the fortunate situation of being able to grow rapidly because we can realize the next expansions by using the infrastructure that already exists. For example, we broke ground on module 1 in May [2000], moved in the machines in October, and were producing the first silicon three months later. That wouldn't work with a greenfield operation."
Just as the company has no plans to shift to 300-mm production, it also sees no immediate need to adopt copper dual-damascene processing. Copper "is not on the horizon at the moment," Kaeppeler says. Micronas's current 0.45-µm technology and the 0.25-µm technology soon to follow will work with aluminum interconnects. "With our products, it is not necessary to be at the leading edge of IC processing. We can be two to three technology generations behind.... But the future will certainly change that," Kaeppeler adds. "We are coming ever closer to the leading edge."
