This presentation will explain the benefits and risks of high-aspect-ratio though-hole vias in high-density and fine-pitch printed circuit boards used in the test interface. Users are facing challenges, including I/O count increases, added requirements for ATE PCB density and shrinking array packages. This is leading some users to incorporate laser drilled micro vias & multi-book sequential laminations to accomplish interconnect. By using high-aspect-ratio vias in conjunction with reduced trace widths, fine-pitch and high-density designs can be simplified with the added benefit of reducing layer counts and costs.
Cuda will present two examples and examine the positive and negative aspects of the two construction methods, including cost factors and lead-time implications, a basic overview of signal integrity impacts on the geometries involved and a breakdown of PCB construction methods.
Multitest (headquartered in Rosenheim, Germany) is one of the world’s leading manufacturers of test equipment for semiconductors. Multitest markets test handlers, contactors, and ATE printed circuit boards. Globally, more than 700 employees serve the company’s customers in offices and branches in North America, Singapore, Malaysia, the Philippines, Taiwan, China and Thailand. http://www.multitest.com