solder ball

You may try reduction on stencil aperture on the particular IC location. Reduction on width and extend outer length may help to minimise solder ball issue. However, please look into stencil foil thickness to meet AR.

This message was posted the Electronics Forum @ SMTA

reply »

This one is easy. Go to 5mil stencil and reduce apertures in width. try to have 10mil aperture width and 10 mil distance in between. If you give us numbers we will be more precise.

reply »

Solder ball attached on solder joint without violation minimum electrical clearance is acceptable. If your process parameter including stencil not changed, suggest you check if solder pasted being pushed out after IC placement, also check if solder joint wetting is good. Anyway paste on center of pad is better.

reply »

It is strange that you're having issues while using the same process parameters (including stencil) that worked successfully before. It doesn't guarantee that it's not one of those parameters changing in a manner that's not apparent, but it does suggest that you should be looking at anything else that could also have changed.

Are these PCB's from the same batch, or are they a new run?

Did you change anything about the paste (flux chemistry, powder size)?

Are your environmental parameters (room temperature and humidity) any different?

Edited to add that regardless of what changed, I'd *guess* that a new stencil layout for that part with reduced width apertures for the leads and a proper sectioning of the ground pad that gives you 30-40% volume reduction would take care of this issue regardless of what's going on elsewhere. The only reason I say *guess* is that you haven't shared the details of the component termination and stencil geometries.

reply »