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TOMBSTONE defect Redution suggestion.

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Hi All, We are frequently getting tombstone in an induction... - Sep 06, 2020 by Srini  

#85603

TOMBSTONE defect Redution suggestion. | 6 September, 2020

Hi All,

We are frequently getting tombstone in an induction component. (0102)

There is no paste offset or placement offset.

PCB pad design is not as per recommendation.

Stencil opening is 1:1

Same part used in two locations and both the location we are getting tombstone.

I have attached images for your reference.

I am thinking about stencil design to reduce the paste deposition.

I have also observed that component is been lifted up from only one pad so thinking about giving offset in placement and monitor the same.

Kindly guide me what to do.

Attachments:

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#85605

TOMBSTONE defect Redution suggestion. | 7 September, 2020

Tombstone is often caused by an imbalance of temperature, pad shape or spacing, component termination, and component positioning. Pate formulation and reflow atmosphere are other common causes.

Looking at the pads and components in your pictures makes me very twitchy because there is very little component body & termination of the pad. The pads seem too far apart for the component.

For more search SMTnet FORUM Archives. There are 10 pages of FORUM posting on tombstone.

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#85608

TOMBSTONE defect Redution suggestion. | 8 September, 2020

> Tombstone is often caused by an imbalance of
> temperature, pad shape or spacing, component
> termination, and component positioning. Pate
> formulation and reflow atmosphere are other
> common causes.

Looking at the pads and
> components in your pictures makes me very twitchy
> because there is very little component body &
> termination of the pad. The pads seem too far
> apart for the component.

For more search SMTnet
> FORUM Archives. There are 10 pages of FORUM
> posting on tombstone.

Are you sure? The pads in their images come way under the device as well as having buckets (excessive to my mind) to spare for a good fillet. What I think we can see is lots of mid-chip solder balling. The OP accepts the pad design is not optimum but I think the tomb stoning would be greatly reduced by using a stencil that has a homeplate aperture reduction (or similar) on that pad-shape. Not a common thing to do on 0402 perhaps but perhaps with those dimensions it will work, I suspect the two devices in question are also on thermally unbalanced pads which is why they are the worst offenders .

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#85609

TOMBSTONE defect Redution suggestion. | 8 September, 2020

I concur with Spoilt on all accounts.

If the tombstones are isolated to the same P/N this is an indicator that your process is probably not to blame. At this point you have to try and mitigate the issue.

Things to try [if possible] :

1. Try a soak at 150 to 170C for 60-90 seconds. 2. Switch to a less aggressive paste chemistry. 3. If using Nitrogen increase O2 PPM or shut Nitrogen off 4. Try a "reverse C" aperture design.

We don't think messing with placement pressure or offsets will gain you anything.

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SMTA-64387687

#85610

TOMBSTONE defect Redution suggestion. | 8 September, 2020

Have you tried rotating the board 90 or 180 going into the oven? With inductive components there's a possibility of magnetic current buildup, that pulls the component to one of the pads. Although, I've only seen it on larger inductors. Also, the presence of excessive solder balls shows that you are definitely putting down too much paste. But, I would double check your profile, as well.

This message was posted via the Electronics Forum @ SMTASMTA

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#85615

TOMBSTONE defect Redution suggestion. | 10 September, 2020

Are parts always following the same side/direction of tombstone? 1. Run 180 and observe if tombstone moves or remains the same 2. Too much paste under the part - reduce aperture and move it out to the lead. 3. Soak profile for even heat distribution helps tombstoning

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#85617

TOMBSTONE defect Redution suggestion. | 11 September, 2020

Thanks for your inputs already will search the same.

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#85618

TOMBSTONE defect Redution suggestion. | 11 September, 2020

Thanks for your response. I am reducing the stencil opening and ensuring no solder paste deposited at the cornor of the pad. Not moving to homeplate design considering the component size. Will share the exact design.

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#85619

TOMBSTONE defect Redution suggestion. | 11 September, 2020

Thanks for your inputs.

Soak - 120 to 180 at average 110sec Paste - Senju - S70G - Type 5 (also suspect paste chemistry yet it's customer defined I can't do anything about this) N2 - maintaining O2 PPM at 1000 Stencil - planning to reduce the stencil opening or do I need to provide what you recommend!

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#85620

TOMBSTONE defect Redution suggestion. | 11 September, 2020

Thanks for your response.

Yes Tombstone is happening in same direction only.

We can't rotate every board since the issue is random and the defect rate is around 0.1%

Already using high soak profile.

Stencil modification in progress.

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Djo

#85621

TOMBSTONE defect Redution suggestion. | 11 September, 2020

ALl you need is stencil design optimization.. Is it a 0201 or 0402 component?

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#85622

TOMBSTONE defect Redution suggestion. | 11 September, 2020

Yes it's 0201.

Homeplate design is not recommended. Simple going to reduce the aperture size. Just planning to reduce it in both the pad cornor.

What's your recommendation.

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#85623

TOMBSTONE defect Redution suggestion. | 11 September, 2020

https://www.worthingtonassembly.com/blog/2018/1/29/the-perfect-0201-footprint

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Djo

#85624

TOMBSTONE defect Redution suggestion. | 11 September, 2020

You haven't communicated what thickness of stencil you are working with ... it's interesting to know..at first, you need to reduce the amount of CAB deposited because with 1X1 stencil aperture size you are depositing an amount important CAB .. so, I recommend a new stencil design (see photo below) .. with a 100µm thick stencil. I am confident of this design to give better result. D = 0.31 L = 0.31 A = 0.2

Attachments:

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#85627

TOMBSTONE defect Redution suggestion. | 12 September, 2020

Thank you for the information.

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#85628

TOMBSTONE defect Redution suggestion. | 12 September, 2020

Thanks for the information. Much appreciated.

We are using 79um thickness stencil. I will share the inputs to my stencil manufacturer.

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Djo

#85632

TOMBSTONE defect Redution suggestion. | 12 September, 2020

u are Welcome . Waiting from you to share results..

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#85647

TOMBSTONE defect Redution suggestion. | 17 September, 2020

Hi Srini,

Good day !!

I the issue resolved. Which stencil design you used.

We have similar kind of issue in 0402 package. very random failures.

192 part placement . randomly 1 or 2 component fail.

Regards, Ameen

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#85674

TOMBSTONE defect Redution suggestion. | 23 September, 2020

Hi Ameen,

As I said before my defect rate is 0.001% and i am planning to reduce the stencil opening only.

Will share the result once I implement it.

Expected to complete it withing next week.

Thank you.

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#85684

TOMBSTONE defect Redution suggestion. | 25 September, 2020

Hi Srini,

Thanks a lot. Please share me the design you will be implementing. It will be very helpful.

Regards, Ameen

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#85791

TOMBSTONE defect Redution suggestion. | 18 October, 2020

Hi All,

Thanks for your response and support.

Attached is the design used.

I found out the below design details in another model.

Can used this also.

0.28x0.24 mm is the dimensions available in other model (no tombstone issue occurring).

Attachments:

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#85792

TOMBSTONE defect Redution suggestion. | 19 October, 2020

Hi Srini,

Thanks a lot for sharing the same.

Regards, Ameen

reply »


Djo

#85794

TOMBSTONE defect Redution suggestion. | 19 October, 2020

Hello , Good..It's the same design that i recommend it to you before..

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