PTH Core-to-Core Interconnect Using Sintered Conductive Pastes
Published: |
March 7, 2013 |
Author: |
Michael Matthews, Ken Holcomb, Jim Haley, Catherine Shearer |
Abstract: |
The market for high-layer-count printed circuit boards (PCB) containing blind and buried vias was once relatively small, and focused on specialized applications in the military and high end computing. The demand for these types of PCBs today is being driven by an increasing number of commercial applications in the telecommunications and semiconductor test market segments. These applications typically require high-aspect-ratio plated-through-holes (PTHs) and blind and buried vias in order to meet the applications interconnect density requirements. Blind and buried vias and high aspect ratio PTHs continue to present manufacturing challenges and frequently are the limiting features to achieving high fabrication yield... First published in the 2012 IPC APEX EXPO technical conference proceedings... |
You must be a registered user to talk back to us. |
Company Information:
More SMT / PCB assembly technical articles »
- Apr 11, 2022 - iNEMI Webinar 07.07.2021 - PCB Cleaning | ZESTRON Americas
- Jan 28, 2022 - Open Radio Unit White Box 5G | Whizz Systems
- Nov 10, 2021 - Understanding the Cleaning Process for Automatic Stencil Printers | ITW EAE
- Oct 20, 2021 - PCB Surface Finishes & The Cleaning Process - A Compatibility Study | ZESTRON Americas
- Oct 06, 2021 - Cleaning Before Conformal Coating | ZESTRON Americas
- Browse Technical Library »
PTH Core-to-Core Interconnect Using Sintered Conductive Pastes article has been viewed 669 times